As a structure for realizing a scaled down MOSFET having a gate length of 30 nm or less, a nanowire-type channel transistor (nanowire transistor) instead of the planar transistor is expected. Because, the nanowire-type channel transistor is capable of suppressing a short channel effect. The nanowire transistor, for example, is provided with a silicon substrate, a buried dioxide film formed on the silicon substrate, a semiconductor layer including one or more plate-shaped silicon nanowires serving as a channel region formed on the buried dioxide film, a gate insulating film formed on a side surface and an upper surface of the nanowire, a gate electrode formed on the gate insulating film, gate sidewalls formed on both sides (a gate length direction) of the gate electrode, and a source region and a drain region which are formed on a wide portion of the semiconductor layer and the nanowire so as to interpose the channel region.
In the nanowire, the region which includes the gate electrode formed on the upper portion thereof serves as the channel region. The channel region is configured to have a plate shape in which the width (the length in the gate width direction) is about 3 nm to 25 nm and the height thereof is about 3 nm to 40 nm. Since the channel region is covered by the gate electrode, the influence of an electric field applied by the gate electrode is strong and the short channel effect can be suppressed. The nanowire transistor is also referred to as a tri-gate transistor since total three surfaces (the upper surface and both side surfaces) of the nanowire operate as channels.
In order to put the nanowire transistor to practical use, there is a need to adjust a threshold voltage thereof. A method of controlling an impurity concentration of the channel region can be considered as a method of adjusting the threshold voltage. In addition, controlling the work function of the gate electrode by appropriately selecting the impurity concentration and a material of the gate electrode can be considered.
However, if the impurity is excessively introduced to the channel region, a decrease in on-state current caused by scattering of charge carriers due to the impurity and a variability in the threshold voltage caused by a variability in the impurity concentration become issues. In addition, as for the selection in the impurity concentration of the gate electrode and the material of the gate electrode, since there are some constraints on ease of manufacturing process, consistency with the process after the formation of the gate electrode, and the like, it is difficult to find out an optimal solution.